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參數(shù)資料
| 型號： | 62LV256 |
| 廠商： | Integrated Silicon Solution, Inc. |
| 英文描述： | 32K x 8 LOW VOLTAGE STATIC RAM |
| 中文描述： | 32K的× 8低壓靜態(tài)RAM |
| 文件頁數(shù)： | 1/9頁 |
| 文件大小： | 40K |
| 代理商： | 62LV256 |
IS62LV256
ISSI
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. K
12/11/02
1
Copyright 2002 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
FEATURES
Access time: 45, 70 ns
Low active power: 70 mW
Low standby power
— 45 μW CMOS standby
Fully static operation: no clock or refresh
required
TTL compatible inputs and outputs
Single 3.3V power supply
DESCRIPTION
The
ISSI
IS62LV256 is a very high-speed, low power,
32,768-word by 8-bit static RAM. It is fabricated using
ISSI
's
high-performance CMOS double-metal technology.
When
CE
is HIGH (deselected), the device assumes a
standby mode at which the power dissipation is reduced to
10 μW (typical) with CMOS input levels.
Easy memory expansion is provided by using an active LOW
Chip Enable (
CE
) input and an active LOW Output Enable
(
OE
) input. The active LOW Write Enable (
WE
) controls both
writing and reading of the memory.
The IS62LV256 is pin compatible with other 32K x 8 SRAMs
in 300-mil SOJ, 330-mil plastic SOP, and TSOP (Type I Normal
and Reverse Bent) packages.
32K x 8 LOW VOLTAGE STATIC RAM
FUNCTIONAL BLOCK DIAGRAM
A0-A14
CE
OE
WE
256 X 1024
MEMORY ARRAY
DECODER
COLUMN I/O
CONTROL
CIRCUIT
GND
VCC
I/O
DATA
CIRCUIT
I/O0-I/O7
DECEMBER 2002
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