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參數(shù)資料
| 型號(hào)： | MC33790EGR2 |
| 廠商： | Motorola, Inc. |
| 英文描述： | Two-Channel Distributed System Interface (DSI) Physical Interface Device |
| 中文描述： | 雙通道分布式系統(tǒng)接口（DSI）的物理接口設(shè)備 |
| 文件頁數(shù)： | 8/12頁 |
| 文件大小： | 233K |
| 代理商： | MC33790EGR2 |
33790
8
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
SYSTEM/APPLICATION INFORMATION
INTRODUCTION
The 33790 is designed to provide the interface between logic
and the DSI bus. It accepts signals with a typical 0 V to 5.0 V
logic level to control the state of the bus output (Idle Level, Logic
High Level, Logic Low Level, and High Impedance). It detects
the current drawn from the bus output during signaling and
outputs a 0 V to 5.0 V logic level corresponding to the bus
current being above (Logic [1] out) the bus return logic [1]
current or below (Logic [0] out). The 33790 contains current
limiting of the bus outputs as required by the DSI Bus
specification and thermal shutdown to protect itself from
damage. Two independent DSI bus outputs are provided by the
IC.
FUNCTIONAL DESCRIPTION
Bus Driver and Receiver
The Wave-Shaper converts the 0 V to 5.0 V logic inputs from
DSIxF (frame) and DSIxS (signal) to a wave-shaped signal on
the DSIxO output, as shown in the timing diagrams in
Figure 2
,
page 7, and the truth table in
Table 1
. The Bus Current Sense
detects the current being drawn by the device(s) on the bus
during signalling (DSIxF=0). If the current is above a set level,
DSIxR will be high; otherwise, it is low.
The current for the idle state is from the supply connected to
V
SUP
and this supply should not be current limited below
250 mA per channel. During idle state, the voltage on the DSI
bus will be very close to the V
SUP
voltage.
Internal thermal shutdown circuitry and current limit
individually protect the DSIxO outputs from shorts to battery
and ground.
Typically, the thermal shutdown occurs between 160
°
C and
170
°
C. If the junction temperature rises above this temperature,
the output drivers for DSIxO are disabled by the thermal
shutdown circuitry. The output drivers remain off until the
junction temperature decreases below approximately 155
°
C, at
which time the thermal shutdown circuitry turns off and the
outputs are re-enabled. Each DSIxO output has a unique
thermal sense and shutdown circuit, so a short on one channel
does not affect the other channel.
Charge Pump
The charge pump uses on-board capacitors to step the input
voltage up to the voltage needed to drive the on-board
transmitter FETs. A filter/storage capacitor is connected to
CPCAP to hold the stepped-up voltage.
Input Pull-Ups and Pull-Downs
Internal current pull-ups are used on the DSIxF pins and pull-
downs on the DSIxS pins. If these pins are left unconnected,
their associated DSI bus will go to the unused (high impedance)
state.
APPLICATIONS
The 33790 is intended for use in a DSI system. This device
supplies the interface between standard logic levels and the
voltage and current required for the DSI bus. Two independent
DSI busses are supported by this part. The 33790 does not
form the timing for the DSI bus. This is done by logic either
embedded in a microcontroller or by the MC68HC55, which
uses SPI commands and forms DSI protocol for
communications over the DSI bus.
The pins from the MC68HC55 are made to line up with the
pins connecting to the 33790. This includes all the DSIxF,
DSIxS, and DSIxR pins.
A capacitor attached to CPCAP serves as a charge reservoir
for the gate drive charge pump. This circuit creates a voltage
that is higher than the source of the N-channel output transistor.
This allows turning on of the transistor enough to prevent any
significant voltage drop across it. The rest of charge pump
electronics are completely self-contained on the IC.
Table 1. DSI Bus Truth Table
DSIxF
DSIxS
T
LIM
DSIR
DSIxO
0
0
0
Return Data
Low (1.5 V)
0
1
0
Return Data
High (4.5 V)
1
0
0
0
High Impedance
1
1
0
0
Idle
≥
V
SUP
-0.5 V
X
X
1
1
High Impedance
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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