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參數資料
| 型號： | MC34065DW |
| 廠商： | MOTOROLA INC |
| 元件分類： | 穩壓器 |
| 英文描述： | Ultra-Small 3-Pin Supply Voltage Supervisor 5-SC70 -40 to 85 |
| 中文描述： | 1 A SWITCHING CONTROLLER, 500 kHz SWITCHING FREQ-MAX, PDSO16 |
| 封裝： | PLASTIC, SO-16 |
| 文件頁數： | 10/16頁 |
| 文件大小： | 419K |
| 代理商： | MC34065DW |
MC34065–H, L MC33065–H, L
10
MOTOROLA ANALOG IC DEVICE DATA
Figure 19. Adjustable Reduction of Clamp Level
Figure 20. Soft–Start Circuit
Figure 21. Adjustable Reduction of Clamp Level
with Soft–Start
Figure 22. MOSFET Parasitic Oscillations
Figure 23. Current Sensing Power MOSFET
Figure 24. Current Waveform Spike Suppression
–
+
+
–
–
+
Vref
15
1
3
2
4
5
R1
R2
EA1
R
R
Bias
5.0Vref
Osc.
S
R
Q
+
_
20k
VCC
Vin
Q1
RS
6
7
16
VClamp
1.0mA
2R
R
1.0V
PWM
Latch 1
+
_
VClamp
≈
1.67
R2
R1
1
+ 0.33 x 10–3 (R1)
Ipk(max)
≈
VClamp
RS
Where: 0
≤
VClamp
≤
1.0 V
–
+
–
+
Bias
Osc.
1.0mA
1.0M
C
15
1
3
2
4
EA1
R
1.0V
20k
R
R
Vref
tSoft–Start
≈
2100 C in
μ
F
5
2R
C
R1R2
R1
R2
–
+
–
+
–
+
Vin
VCC
16
+
_
+
_
Q1
RS
6
7
5.0Vref
20k
Bias
R
R
Vref
15
1
3
2
4
5
MPSA63
R1
R2
C
EA1
2R
1.0V
R
VClamp
PWM
Latch 1
S
R
Q
Ipk(max)
≈
VClamp
RS
R2
R1
1
VClamp
≈
1.67
Where: 0
≤
VClamp
≤
1.0 V
tSoft–Start = In
Osc
–
+
1
1 –
VC
3 VClamp
Series gate resistor Rg may be needed to damp high frequency parasitic
wiring inductance in the gate–source circuit. Rg will decrease the MOSFET
switching speed. Schottky diode D1 is required if circuit ringing drives the
–
+
–
+
+
–
VCC
16
+
_
5.0Vref
+
–
PWM
Latch 1
S
Q
R
1N5819
Rg
Q1
RS
7
6
Vin
D1
Virtually lossless current sensing can be achieved with the implementation of a
SENSEFET power switch. For proper operation during over current conditions, a
reduction of the Ipk(max) clamp level must be implemented. Refer to Figures 19 and 21.
_
+
_
+
+
_
+
–
S
R
Q
VCC
Vin
5.0Vref
PWM
Latch 1
7
6
RS
D
S
K
M
G
SENSEFET
Power Ground to
Input Source Return
Drive Ground
to Pin 9
Control Circuitry Ground
to Pin 8
If: SENSEFET = MTP10N10M
RS = 200
Then: VPin 6 = 0.075 Ipk
VPin 6
≈
+
_
16
rDM(on) + RS
RS Ipk rDS(on)
The addition of the RC filter will eliminate instability caused by the leading
edge spike on the current waveform.
_
+
+
_
_
+
+
_
Vin
Q1
RS
+
–
5.0Vref
S
R
Q
PWM
Latch 1
VCC
7
6
16
C
R
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