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參數(shù)資料
| 型號： | MC74HC4053N |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 運動控制電子 |
| 英文描述： | Analog Multiplexers/Demultiplexers |
| 中文描述： | TRIPLE 1-CHANNEL, SGL ENDED MULTIPLEXER, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁數(shù)： | 10/15頁 |
| 文件大小： | 451K |
| 代理商： | MC74HC4053N |
MC54/74HC4051 MC74HC4052 MC54/74HC4053
MOTOROLA
High–Speed CMOS Logic Data
DL129 — Rev 6
10
RL
Figure 12. Crosstalk Between Any Two
Switches, Test Set–Up
Figure 13. Power Dissipation Capacitance,
Test Set–Up
Figure 14a. Total Harmonic Distortion, Test Set–Up
Figure 14b. Plot, Harmonic Distortion
0
–10
–20
–30
–40
–50
–100
1.0
2.0
3.125
FREQUENCY (kHz)
d
–60
–70
–80
–90
FUNDAMENTAL FREQUENCY
DEVICE
SOURCE
ON
6
7
8
16
VEE
CL*
*Includes all probe and jig capacitance
OFF
RL
RL
VIS
RL
CL*
VOS
fin
0.1
μ
F
ON/OFF
6
7
8
16
VCC
CHANNEL SELECT
NC
COMMON O/I
OFF/ON
ANALOG I/O
VCC
A
11
VCC
VEE
ON
6
7
8
16
VCC
VEE
0.1
μ
F
CL*
fin
RL
TO
DISTORTION
METER
*Includes all probe and jig capacitance
VOS
VIS
APPLICATIONS INFORMATION
The Channel Select and Enable control pins should be at
VCC or GND logic levels. VCC being recognized as a logic
high and GND being recognized as a logic low. In this exam-
ple:
VCC = +5V = logic high
GND = 0V = logic low
The maximum analog voltage swings are determined by
the supply voltages VCC and VEE. The positive peak analog
voltage should not exceed VCC. Similarly, the negative peak
analog voltage should not go below VEE. In this example, the
difference between VCC and VEE is ten volts. Therefore,
using the configuration of Figure 15, a maximum analog sig-
nal of ten volts peak–to–peak can be controlled. Unused
analog inputs/outputs may be left floating (i.e., not con-
nected). However, tying unused analog inputs and outputs to
VCC or GND through a low value resistor helps minimize
crosstalk and feedthrough noise that may be picked up by an
unused switch.
Although used here, balanced supplies are not a require-
ment. The only constraints on the power supplies are that:
VCC – GND = 2 to 6 volts
VEE – GND = 0 to –6 volts
VCC – VEE = 2 to 12 volts
and VEE
≤
GND
When voltage transients above VCC and/or below VEE are
anticipated on the analog channels, external Germanium or
Schottky diodes (Dx) are recommended as shown in Figure
16. These diodes should be able to absorb the maximum
anticipated current surges during clipping.
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| MC74HC4060AD | 功能描述:計數(shù)器移位寄存器 2-6V 14-Stage Binary RoHS:否 制造商:Texas Instruments 計數(shù)器類型: 計數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
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| MC74HC4060ADR2 | 功能描述:計數(shù)器移位寄存器 2-6V 14-Stage Binary RoHS:否 制造商:Texas Instruments 計數(shù)器類型: 計數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| MC74HC4060ADR2G | 功能描述:計數(shù)器移位寄存器 2-6V 14-Stage Binary RoHS:否 制造商:Texas Instruments 計數(shù)器類型: 計數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
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