- 您現在的位置：買賣IC網 > PDF目錄371076 > MC908QL4V (Motorola, Inc.) Microcontrollers PDF資料下載
參數資料
| 型號： | MC908QL4V |
| 廠商： | Motorola, Inc. |
| 英文描述： | Microcontrollers |
| 中文描述： | 微控制器 |
| 文件頁數： | 161/222頁 |
| 文件大小： | 2861K |
| 代理商： | MC908QL4V |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁當前第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁第171頁第172頁第173頁第174頁第175頁第176頁第177頁第178頁第179頁第180頁第181頁第182頁第183頁第184頁第185頁第186頁第187頁第188頁第189頁第190頁第191頁第192頁第193頁第194頁第195頁第196頁第197頁第198頁第199頁第200頁第201頁第202頁第203頁第204頁第205頁第206頁第207頁第208頁第209頁第210頁第211頁第212頁第213頁第214頁第215頁第216頁第217頁第218頁第219頁第220頁第221頁第222頁
Initialization/Application Information
MC68HC908QL4 MC68HC908QL3 MC68HC908QL2 Data Sheet, Rev. 4
Freescale Semiconductor
161
byte count in the SLIC is
.
If programming in C, make sure to use the
STATIC modifier on this variable (or make it a global variable) to ensure
that it keeps its value between interrupts
.
14.9.9.3 Transmit Abort
The transmit abort bit (TXABRT) in SLCC1 allows the user to cease transmission of data on the next byte
boundary. When this bit is set to 1, it will finish transmitting the byte currently being transmitted, then
cease transmission. After the transmission is successfully aborted, TXABRT will automatically be reset
by the SLIC to 0. If the SLIC is not in process of transmitting at the time TXABRT is written to 1, there is
no effect and TXABRT will read back as 0.
14.9.9.4 Possible Errors on Request Message Data
Possible errors on request message data are:
Byte Framing Error
Checksum-Error (LIN specified error)
Bit-Error
14.9.10 Handling IMSG to Minimize Interrupts
The IMSG feature is designed to minimize the number of interrupts required to maintain LIN
communications. On a network with many slave nodes, it is very likely that a particular slave will observe
messages which are not intended for that node. When the SLIC module detects any message header, it
synchronizes to that message frame and bit rate, then interrupts the CPU after the identifier byte has been
successfully received and parity checked. At this time, if the software determines that the message may
be ignored, IMSG may be set to indicate to the module that the data field of the message frame is to be
ignored and no additional interrupts should be generated until the next valid message header is received.
The bit is automatically reset to 0 after the current message frame is complete and the LIN bus returns to
idle state. This reduces the load on the CPU and allows the application software to immediately begin
performing any operations which might otherwise not be allowed while receiving messaging.
NOTE
IMSG will prevent another interrupt from occurring for the current message
frame, however if data bytes are appearing on the bus they may be
received and copied into the message buffer. This will delete any previous
data which might have been present in the buffer, even though no interrupt
is triggered to indicate the arrival of this data.
14.9.11 Sleep and Wakeup Operation
The SLIC module itself has no special sleep mode, but does support low-power modes and wake-up on
network activity. For low-power operations, the user must select whether or not to allow the SLIC clock to
continue operating when the MCU issues a wait instruction through the SLC wait clock mode (SLCWCM)
bit in SLCC1. If SLCWCM = 1, the SLIC will enter SLIC STOP mode when the MCU executes a WAIT
instruction. If SLCWCM = 0, the SLIC will enter SLIC WAIT mode when the MCU executes a WAIT
instruction. For more information on these modes, as well as wakeup options from these modes, please
refer to
14.5 Modes of Operation
.
When network activity occurs, the SLIC module will wake the MCU out of stop or wait mode, and return
the SLIC module to SLIC run mode. If the SLIC was in SLIC wait mode, normal SLIC interrupt processing
相關PDF資料 |
PDF描述 |
|---|---|
| MC912DG128x | microcontroller unit 16BIT DEVICE |
| MC68HC912DG128A | microcontroller unit 16BIT DEVICE |
| MC912DG128A | microcontroller unit 16BIT DEVICE |
| MC68HC912DT128A | microcontroller unit 16BIT DEVICE |
| MC92052 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| MC908QL4VDTE | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:M68HC08 Microcontrollers |
| MC908QL4VDWE | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:M68HC08 Microcontrollers |
| MC908QT1 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
| MC908QT1A | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
| MC908QT1ACDTE | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:M68HC08 Microcontrollers |
發布緊急采購，3分鐘左右您將得到回復。