- 您現在的位置：買賣IC網 > PDF目錄382646 > TMX320C6202BGHK167 (Texas Instruments, Inc.) FIXED-POINT DIGITAL SIGNAL PROCESSORS PDF資料下載
參數資料
| 型號： | TMX320C6202BGHK167 |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 數字信號處理 |
| 英文描述： | FIXED-POINT DIGITAL SIGNAL PROCESSORS |
| 中文描述： | 定點數字信號處理器 |
| 文件頁數： | 52/83頁 |
| 文件大小： | 1176K |
| 代理商： | TMX320C6202BGHK167 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁當前第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁
TMS320C6211, TMS320C6211B
FIXED-POINT DIGITAL SIGNAL PROCESSORS
SPRS073K
AUGUST 1998
REVISED MARCH 2004
52
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
1443
SYNCHRONOUS DRAM TIMING
timing requirements for synchronous DRAM cycles
(see Figure 22)
NO.
C6211
150
C6211
167
C6211BGFNA
150
C6211B
150
C6211B
167
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
6
t
su(EDV-EKOH)
Setup time, read EDx valid before
ECLKOUT high
2.5
2.5
2.5
ns
7
t
h(EKOH-EDV)
Hold time, read EDx valid after
ECLKOUT high
1
2.5
2
ns
The C6211/C6211B SDRAM interface takes advantage of the internal burst counter in the SDRAM. Accesses default to incrementing 4-word
bursts, but random bursts and decrementing bursts are done by interrupting bursts in progress. All burst types can sustain continuous data flow.
switching characteristics over recommended operating conditions for synchronous DRAM
cycles
(see Figure 22
Figure 28)
NO.
PARAMETER
C6211
150
C6211
167
C6211BGFNA
150
C6211B
150
C6211B
167
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
1
t
d(EKOH-CEV)
Delay time, ECLKOUT high to CEx
valid
1.5
6.5
1
6.5
1.2
6.5
ns
2
t
d(EKOH-BEV)
Delay time, ECLKOUT high to BEx
valid
6.5
6.5
6.5
ns
3
t
d(EKOH-BEIV)
Delay time, ECLKOUT high to BEx
invalid
1.5
1
1.2
ns
4
t
d(EKOH-EAV)
Delay time, ECLKOUT high to EAx
valid
6.5
6.5
6.5
ns
5
t
d(EKOH-EAIV)
Delay time, ECLKOUT high to EAx
invalid
1.5
1
1.2
ns
8
t
d(EKOH-CASV)
Delay time, ECLKOUT high to
ARE/SDCAS/SSADS valid
1.5
6.5
1
6.5
1.2
6.5
ns
9
t
d(EKOH-EDV)
Delay time, ECLKOUT high to EDx
valid
7
7
7
ns
10
t
d(EKOH-EDIV)
Delay time, ECLKOUT high to EDx
invalid
1.5
1
1.2
ns
11
t
d(EKOH-WEV)
Delay time, ECLKOUT high to
AWE/SDWE/SSWE valid
1.5
6.5
1
6.5
1.2
6.5
ns
12
t
d(EKOH-RAS)
Delay time, ECLKOUT high to
AOE/SDRAS/SSOE valid
1.5
6.5
1
6.5
1.2
6.5
ns
The C6211/C6211B SDRAM interface takes advantage of the internal burst counter in the SDRAM. Accesses default to incrementing 4-word
bursts, but random bursts and decrementing bursts are done by interrupting bursts in progress. All burst types can sustain continuous data flow.
ARE/SDCAS/SSADS, AWE/SDWE/SSWE, and AOE/SDRAS/SSOE operate as SDCAS, SDWE, and SDRAS, respectively, during SDRAM
accesses.
相關PDF資料 |
PDF描述 |
|---|---|
| TMX320C6203BGHK167 | FIXED-POINT DIGITAL SIGNAL PROCESSORS |
| TMX320C6211BGHK167 | MS3472W18-32P |
| TMP320C6202BGHK167 | FIXED-POINT DIGITAL SIGNAL PROCESSORS |
| TMX320C6202BGLW167 | FIXED-POINT DIGITAL SIGNAL PROCESSORS |
| TMX320C6203BGLW167 | FIXED-POINT DIGITAL SIGNAL PROCESSORS |
相關代理商/技術參數 |
參數描述 |
|---|---|
| TMX320C6202BGJC100 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PROCESSOR |
| TMX320C6202BGJC167 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PROCESSORS |
| TMX320C6202BGJL100 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PROCESSOR |
| TMX320C6202BGJL167 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PROCESSORS |
| TMX320C6202BGLS100 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PROCESSOR |
發布緊急采購，3分鐘左右您將得到回復。