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參數(shù)資料
| 型號： | AD7575JP |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | LC2MOS 5 us 8-Bit ADC with Track/Hold |
| 中文描述： | 1-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PQCC20 |
| 封裝： | PLASTIC, LCC-20 |
| 文件頁數(shù)： | 3/12頁 |
| 文件大?。?/td> | 146K |
| 代理商： | AD7575JP |
AD7575
–3–
REV. B
TIMING SPECIFICATIONS
1
Limit at +25
8
C
(All Versions)
Limit at T
MIN
, T
MAX
(J, K, A, B Versions)
Limit at T
MIN
, T
MAX
(S, T Versions)
Parameter
Units
Conditions/Comments
t
1
t
2
t
32
t
4
t
5
t
62
t
73
0
100
100
100
0
80
10
80
0
0
100
100
100
0
80
10
80
0
0
120
120
120
0
100
10
100
0
ns min
ns max
ns max
ns min
ns min
ns max
ns min
ns max
ns min
CS
to
RD
Setup Time
RD
to
BUSY
Propagation Delay
Data Access Time after
RD
RD
Pulse Width
CS
to
RD
Hold Time
Data Access Time after
BUSY
Data Hold Time
t
8
BUSY
to
CS
Delay
NOTES
1
Timing specifications are sample tested at +25
°
C to ensure compliance. All input control signals are specified with tr = tf = 20 ns (10% to 90% of +5 V)
and timed from a voltage level of 1.6 V.
2
t
3
and t
6
are measured with the load circuits of Figure 1 and defined as the time required for an output to cross 0.8 V or 2.4 V.
3
t
7
is defined as the time required for the data lines to change 0.5 V when loaded with the circuits of Figure 2.
Specifications subject to change without notice.
(V
DD
= +5 V, V
REF
= +1.23 V, AGND = DGND = 0 V)
Test Circuits
ABSOLUTE MAXIMUM RATINGS*
V
DD
to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V, +7 V
V
DD
to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V, +7 V
AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, V
DD
Digital Input Voltage to DGND . . . . . . . –0.3 V, V
DD
+ 0.3 V
Digital Output Voltage to DGND . . . . . . –0.3 V, V
DD
+ 0.3 V
CLK Input Voltage to DGND . . . . . . . . . –0.3 V, V
DD
+ 0.3 V
V
REF
to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, V
DD
AIN to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, V
DD
Operating Temperature Range
Commercial (J, K Versions) . . . . . . . . . . . . . . 0
°
C to +70
°
C
Industrial (A, B Versions) . . . . . . . . . . . . . –25
°
C to +85
°
C
Extended (S, T Versions) . . . . . . . . . . . . . –55
°
C to +125
°
C
Storage Temperature Range . . . . . . . . . . . . –65
°
C to +150
°
C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . .+300
°
C
Power Dissipation (Any Package) to +75
°
C . . . . . . . 450 mW
Derates above +75
°
C by . . . . . . . . . . . . . . . . . . . . . 6 mW/
°
C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7575 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
b High-Z to V
OL
a. High-Z to V
OH
Figure 1. Load Circuits for Data Access Time Test
Figure 2. Load Circuits for Data Hold Time Test
a. V
OH
to High-Z
b. V
OL
to High-Z
WARNING!
ESD SENSITIVE DEVICE
DGND
3k
V
100pF
DBN
DGND
3k
V
100pF
DBN
+5V
DGND
3k
V
10pF
DBN
DGND
3k
V
10pF
DBN
+5V
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