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參數資料
| 型號： | AD7575JP |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | LC2MOS 5 us 8-Bit ADC with Track/Hold |
| 中文描述： | 1-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PQCC20 |
| 封裝： | PLASTIC, LCC-20 |
| 文件頁數： | 4/12頁 |
| 文件大小： | 146K |
| 代理商： | AD7575JP |
AD7575
–4–
REV. B
TERMINOLOGY
LEAST SIGNIFICANT BIT (LSB)
An ADC with 8-bits resolution can resolve 1 part in 2
8
(i.e.,
256) of full scale. For the AD7575 with +2.46 V full-scale one
LSB is 9.61 mV.
TOTAL UNADJUSTED ERROR
This is a comprehensive specification that includes full-scale
error, relative accuracy and offset error.
RELATIVE ACCURACY
Relative Accuracy is the deviation of the ADC’s actual code
transition points from a straight line drawn between the devices
measured first LSB transition point and the measured full-scale
transition point.
SNR
Signal-to-Noise Ratio (SNR) is the ratio of the desired signal to
the noise produced in the sampled and digitized analog signal.
SNR is dependent on the number of quantization levels used in
the digitization process; the more levels, the smaller the quantiza-
tion noise. The theoretical SNR for a sine wave input is given by
SNR
= (6.02
N
+ 1.76)
dB
where
N
is the number of bits in the ADC.
FULL-SCALE ERROR (GAIN ERROR)
The gain of a unipolar ADC is defined as the difference between
the analog input levels required to produce the first and the last
digital output code transitions. Gain error is a measure of the
deviation of the actual span from the ideal span of FS – 2 LSBs.
ANALOG INPUT RANGE
With V
REF
= +1.23 V, the maximum analog input voltage range
is 0 V to +2.46 V. The output data in LSBs is related to the
analog input voltage by the integer value of the following
expression:
Data (LSBs) =
256
AIN
2
V
REF
+
0.5
SLEW RATE
Slew Rate is the maximum allowable rate of change of input
signal such that the digital sample values are not in error. Slew
Rate limitations may restrict the analog signal bandwidth for
full-scale analog signals below the bandwidth allowed from
sampling theorem considerations.
ORDERING GUIDE
Relative
Accuracy
(LSB)
±
1 max
±
1 max
±
1/2 max
±
1 max
±
1/2 max
±
1 max
±
1/2 max
±
1 max
±
1/2 max
±
1 max
±
1/2 max
Temperature
Range
0
°
C to +70
°
C
0
°
C to +70
°
C
0
°
C to +70
°
C
0
°
C to +70
°
C
0
°
C to +70
°
C
–25
°
C to +85
°
C
–25
°
C to +85
°
C
–55
°
C to +125
°
C
–55
°
C to +125
°
C
–55
°
C to +125
°
C
–55
°
C to +125
°
C
Package
Options
2
Model
1
AD7575JR
AD7575JN
AD7575KN
AD7575JP
AD7575KP
AD7575AQ
AD7575BQ
AD7575SQ
AD7575TQ
AD7575SE
AD7575TE
R-18
N-18
N-18
P-20A
P-20A
Q-18
Q-18
Q-18
Q-18
E-20A
E-20A
NOTES
1
To order MIL-STD-883, Class B process parts, add /883B to part number.
Contact local sales office for military data sheet. For U.S. Standard Military
Drawing (SMD), see DESC drawing #5962-87762.
2
E = Leadless Ceramic Chip Carrier; N = Plastic DIP; P = Plastic Leaded Chip
Carrier; Q = Cerdip, R = SOIC.
PIN CONFIGURATIONS
PLCC
DIP/SOIC
LCCC
TOP VIEW
(Not to Scale)
18
17
16
15
14
13
12
11
10
1
2
3
4
5
6
7
8
9
AD7575
DGND
DB5
CS
RD
TP
BUSY
DB6
DB7 (MSB)
CLK
DB4
DB3
V
DD
V
REF
AIN
AGND
DB2
DB1
DB0 (LSB)
TOP VIEW
(Not to Scale)
20 19
1
2
3
18
14
15
16
17
4
5
6
7
8
9
10 11 12 13
N
N
NC = NO CONNECT
BUSY
CLK
DB7 (MSB)
DB6
DB5
AIN
AGND
DB0 (LSB)
DB1
DB2
T
R
C
V
D
V
R
D
D
D
AD7575
3 2 1 20 19
9 10 11 12 13
18
17
16
15
14
4
5
6
7
8
TOP VIEW
(Not to Scale)
PIN 1
NC = NO CONNECT
TP
BUSY
CLK
DB7 (MSB)
DB6
AIN
AGND
DB0 (LSB)
DB1
DB2
AD7575
R
C
N
V
D
V
R
D
D
N
D
D
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| AD7575SE | LC2MOS 5 us 8-Bit ADC with Track/Hold |
| AD7575SQ | LC2MOS 5 us 8-Bit ADC with Track/Hold |
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