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參數(shù)資料
| 型號： | FLASH6_C3 |
| 廠商： | AUSTRIAMICROSYSTEMS AG |
| 英文描述： | ANALOG IP BLOCK FLASH6 - CMOS 6-Bit FLASH A/D CONVERTER |
| 中文描述： | 模擬IP塊FLASH6 -的CMOS 6位閃存的A / D轉(zhuǎn)換器 |
| 文件頁數(shù)： | 3/9頁 |
| 文件大?。?/td> | 243K |
| 代理商： | FLASH6_C3 |
DataSheet:FLASH6-C35
RevisionB,07.09.02
Page3of9
DIGITAL INPUTS ANDOUTPUTS
Symbol
VDD
VSS
VIL
VIH
VOL
VOH
Parameter
Pos.digitalSupplyVoltage
Neg.digitalSupplyVoltage
DigitalInputLevel
Conditions
VDD=VDDA
VSS=VSSA
Mn
3.0
0
VSS
0.7*VDD
Typ
3.3
0
Max
3.6
0
0.3*VDD
VDD
Units
V
V
V
V
V
V
DigitalOutputLevel
VSS
VDD
POWER REQUIREMENTS
Symbol
VDDA
VSSA
IDD
1)
3)
Parameter
Pos.analogSupplyVoltage
Neg.analogSupplyVoltage
SupplyCurrentDigital
Conditions
VDD=VDDA
VSS=VSSA
Mn
3.0
0
Typ
3.3
0
7.5
Max
3.6
0
15
Units
V
V
m
Α
mA
mW
IDDA
1)3)
Psup
1)3)
SupplyCurrentAnalog
SupplyPowerConsumptionPowerUp
Mode
ReferenceCurrent
TotalPowerConsumption
TotalPowerConsumption
PowerDownMode
4
38
8
82,8
IREF
1)3)
Pdiss_tot
1)3)
Pdiss_pd
2)3)
incl.Ref.
5
54,5
30
10
118,8
60
mA
mW
mW
TIMINGCHARACTERISTICS
Symbol
1/Tconv
fclk
Tdap
Tconv
Tpwhclk
Tpwlclk
Jclk
Tdcs
Tsuds
Tdp
Twakeupall
Twakeup
Parameter
ConversionRate
MasterCLOCKFrequency
ApertureDelay
TotalConversionTime
CLOCKPulsewidthHigh
CLOCKPulsewidthLow
CLOCKJitter
DelayTimeCLOCKtoSTROBE
SetupTimeDATAtoSTROBE
DelayTimePipeline
WakeupTimeall
WakeupTime
Conditions
Mn
0.1
0.1
Typ
80
80
1.8
1
6.5
6.5
Max
100
100
Units
MS/sec
MHz
ns
clkcycle
nsec
nsec
sec
nsec
nsec
nsec
nsec
nsec
5
5
1*e
-3
/fin
5.5
0.8
1
50
Twkupall-
Tdap
1)
2)
3)
Measuredduringaconversionwith100MHzclockfrequency.
After10
μ
spowerdown.
Themeasurementincludes8digital(8mA)outputpads.
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