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| 型號(hào)： | MC9S12DG128BMPV |
| 廠商： | MOTOROLA INC |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | MC9S12DT128B |
| 中文描述： | 16-BIT, FLASH, 25 MHz, MICROCONTROLLER, PQFP112 |
| 封裝： | 20 X 20 MM, 1.40 MM HEIGHT, 0.65 MM PITCH, LQFP-112 |
| 文件頁(yè)數(shù)： | 104/124頁(yè) |
| 文件大小： | 577K |
| 代理商： | MC9S12DG128BMPV |
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MC9S12DT128B Device User Guide — V01.07
104
A.5.1.5 Pseudo Stop and Wait Recovery
The recovery from Pseudo STOP and Wait are essentially the same since the oscillator was not stopped in
both modes. The controller can be woken up by internal or external interrupts. After t
wrs
the CPU starts
fetching the interrupt vector.
A.5.2 Oscillator
The device features an internal Colpitts and Pierce oscillator. The selection of Colpitts oscillator or Pierce
oscillator/external clock depends on the XCLKS signal which is sampled during reset.By asserting the
XCLKS input during reset this oscillator can be bypassed allowing the input of a square wave. Before
asserting the oscillator to the internal system clocks the quality of the oscillation is checked for each start
fromeitherpower-on,STOPoroscillatorfail.t
CQOUT
specifiesthemaximumtimebeforeswitchingtothe
internal self clock mode after POR or STOP if a proper oscillation is not detected. The quality check also
determines the minimum oscillator start-up time t
UPOSC
. The device also features a clock monitor. A
Clock Monitor Failure is asserted if the frequency of the incoming clock signal is below the Assert
Frequency f
CMFA.
Table A-15 Oscillator Characteristics
Conditions are shown in
Table A-4
unless otherwise noted
Num C
Rating
Symbol
Min
Typ
Max
Unit
1a
C Crystal oscillator range (Colpitts)
f
OSC
0.5
16
MHz
1b
C Crystal oscillator range (Pierce)
1
NOTES
:
1. Depending on the crystal a damping series resistor might be necessary
2. f
osc
= 4MHz, C = 22pF.
3. Maximum value is for extreme cases using high Q, low frequency crystals
4. XCLKS =0 during reset
f
OSC
0.5
40
MHz
2
P Startup Current
i
OSC
100
μ
A
3
C Oscillator start-up time (Colpitts)
t
UPOSC
8
2
100
3
ms
4
D Clock Quality check time-out
t
CQOUT
0.45
2.5
s
5
P Clock Monitor Failure Assert Frequency
f
CMFA
50
100
200
KHz
6
P External square wave input frequency
4
f
EXT
0.5
50
MHz
7
D External square wave pulse width low
t
EXTL
9.5
ns
8
D External square wave pulse width high
t
EXTH
9.5
ns
9
D External square wave rise time
t
EXTR
1
ns
10
D External square wave fall time
t
EXTF
1
ns
11
D Input Capacitance (EXTAL, XTAL pins)
C
IN
7
pF
12
C
DC Operating Bias in Colpitts Configuration on
EXTAL Pin
V
DCBIAS
1.1
V
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