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參數資料
| 型號： | 68HC05J5A |
| 廠商： | Motorola, Inc. |
| 英文描述： | 8-Bit Microcontroller Units (MCU).(8位微控制器) |
| 中文描述： | 8位微控制器單元（MCU）。（8位微控制器） |
| 文件頁數： | 62/106頁 |
| 文件大小： | 1069K |
| 代理商： | 68HC05J5A |
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GENERAL RELEASE SPECIFICATION
July 16, 1999
MOTOROLA
9-4
16-BIT TIMER
MC68HC05J5A
REV 2.1
counter will not have any effect on the T1OF flag bit and Timer interrupts. The
alternate counter registers include a transparent buffer latch on the LSB of the 16-
bit timer counter.
Figure 9-4. Alternate Counter Block Diagram
The alternate counter registers (ACNTH, ACNTL) shown in
Figure 9-5
are read-
only locations which contain the current high and low bytes of the 16-bit free-run-
ning counter. Writing to the alternate counter registers has no effect. Reset of the
device presets the timer counter to $FFFC.
The ACNTL latch is a transparent read of the LSB until the a read of the ACNTH
takes place. A read of the ACNTH latches the LSB into the ACNTL location until
the ACNTL is again read. The latched value remains fixed even if multiple reads of
the ACNTH take place before the next read of the ACNTL. Therefore, when read-
ing the MSB of the timer at ACNTH the LSB of the timer at ACNTL must also be
read to complete the read sequence.
During power-on-reset (POR), the counter is initialized to $FFFC and begins
counting after the oscillator start-up delay. Because the counter is 16 bits and pre-
ceded by a fixed divide-by-four prescaler, the value in the counter repeats every
262,144 internal bus clock cycles (524,288 oscillator cycles).
Reading the ACNTH and ACNTL in any order or any number of times does not
have any effect on the 16-bit free-running counter or the T1OF flag bit.
BIT 7
Bit15
BIT 6
Bit14
BIT 5
Bit13
BIT 4
Bit12
BIT 3
Bit11
BIT 2
Bit10
BIT 1
Bit9
BIT 0
Bit8
ACNTH
$001A
R
W
reset:
1
1
1
1
1
1
1
1
ACNTL
$001B
R
W
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
reset:
1
1
1
1
1
1
0
0
Figure 9-5. Alternate Counter Registers (ACNTH, ACNTL)
ACNTH ($1A)
TMR LSB
16-BIT COUNTER
÷
4
INTERNAL
CLOCK
(f
OSC
÷
2)
RESET
ACNTL ($1B)
INTERNAL
DATA
BUS
($FFFC)
READ
ACNTH
READ
ACNTL
READ
LATCH
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