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參數資料
| 型號： | 68HC05PL4 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 8-Bit Microcontroller Units (MCU).(8位微控制器) |
| 中文描述： | 8位微控制器單元（MCU）。（8位微控制器） |
| 文件頁數： | 4/98頁 |
| 文件大小： | 1019K |
| 代理商： | 68HC05PL4 |
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GENERAL RELEASE SPECIFICATION
April 30, 1998
MOTOROLA
ii
MC68HC05PL4
REV 2.0
TABLE OF CONTENTS
Section
Page
4.4.2
4.5
4.5.1
4.5.2
4.5.3
4.6
4.7
Miscellaneous Control and Status Register.................................................4-5
16-BIT TIMER INTERRUPTS..........................................................................4-6
Input Capture Interrupt.................................................................................4-6
Output Compare Interrupt............................................................................4-6
Timer Overflow Interrupt..............................................................................4-6
8-BIT TIMER INTERRUPT ..............................................................................4-6
KEYBOARD INTERRUPT ...............................................................................4-7
SECTION 5
RESETS
POWER-ON RESET........................................................................................5-1
EXTERNAL RESET.........................................................................................5-2
INTERNAL RESETS........................................................................................5-2
Power-On Reset (POR)...............................................................................5-3
Computer Operating Properly (COP) Reset................................................5-3
Illegal Address Reset...................................................................................5-4
RESET STATES OF SUBSYSTEM IN MCU...................................................5-5
CPU.............................................................................................................5-5
I/O Registers................................................................................................5-5
8-Bit Timer...................................................................................................5-5
16-Bit Programmable Timer.........................................................................5-5
Keyboard Interrupt Interface........................................................................5-6
6-bit DAC Subsystem ..................................................................................5-6
System Clock Option Subsystem ................................................................5-6
Miscellaneous Subsystem...........................................................................5-6
RESET CHARACTERISTICS..........................................................................5-7
SECTION 6
OPERATING MODES
OPERATING MODES......................................................................................6-1
Single-chip (Normal) Mode..........................................................................6-1
Self-check Mode..........................................................................................6-1
LOW POWER MODES....................................................................................6-2
STOP Mode.................................................................................................6-2
WAIT Mode..................................................................................................6-2
SECTION 7
INPUT/OUTPUT PORTS
PARALLEL PORTS .........................................................................................7-1
Port Data Registers .....................................................................................7-2
Port Data Direction Registers......................................................................7-2
PORT A............................................................................................................7-2
PORT B............................................................................................................7-3
5.1
5.2
5.3
5.3.1
5.3.2
5.3.3
5.4
5.4.1
5.4.2
5.4.3
5.4.4
5.4.5
5.4.6
5.4.7
5.4.8
5.5
6.1
6.1.1
6.1.2
6.2
6.2.1
6.2.2
7.1
7.1.1
7.1.2
7.2
7.3
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