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參數資料
| 型號： | FM24C04A-S |
| 廠商： | Electronic Theatre Controls, Inc. |
| 元件分類： | DRAM |
| 英文描述： | 4Kb FRAM Serial 3V Memory |
| 中文描述： | 4Kb的鐵電串行3V的記憶 |
| 文件頁數： | 4/12頁 |
| 文件大小： | 110K |
| 代理商： | FM24C04A-S |
FM24C04A
Rev. 2.0
July 2003
4 of 12
Figure 3. Data Transfer Protocol
Stop Condition
A Stop condition is indicated when the bus master
drives SDA from low to high while the SCL signal is
high. All operations must end with a Stop condition.
If an operation is pending when a stop is asserted, the
operation will be aborted. The master must have
control of SDA (not a memory read) in order to assert
a Stop condition.
Start Condition
A Start condition is indicated when the bus master
drives SDA from high to low while the SCL signal is
high. All read and write transactions begin with a
Start condition. An operation in progress can be
aborted by asserting a Start condition at any time.
Aborting an operation using the Start condition will
ready the FM24C04A for a new operation.
If during operation the power supply drops below the
specified V
DD
minimum, the system should issue a
Start condition prior to performing another operation.
Data/Address Transfer
All data transfers (including addresses) take place
while the SCL signal is high. Except under the two
conditions described above, the SDA signal should
not change state while SCL is high.
Acknowledge
The Acknowledge takes place after the 8
th
data bit has
been transferred in any transaction. During this state
the transmitter should release the SDA bus to allow
the receiver to drive it. The receiver drives the SDA
signal low to acknowledge receipt of the byte. If the
receiver does not drive SDA low, the condition is a
No-Acknowledge and the operation is aborted.
The receiver could fail to acknowledge for two
distinct reasons. First, if a byte transfer fails, the No-
Acknowledge ends the current operation so that the
device can be addressed again. This allows the last
byte to be recovered in the event of a communication
error. Second and most common, the receiver does
not acknowledge the data to deliberately end an
operation. For example, during a read operation, the
FM24C04A will continue to place data onto the bus
as long as the receiver sends acknowledges (and
clocks). When a read operation is complete and no
more data is needed, the receiver must not
acknowledge the last byte. If the receiver
acknowledges the last byte, this will cause the
FM24C04A to attempt to drive the bus on the next
clock while the master is sending a new command
such as a Stop command.
Slave Address
The first byte that the FM24C04A expects after a
start condition is the slave address. As shown in
Figure 4, the slave address contains the device type,
the device select, the page of memory to be
accessed, and a bit that specifies if the transaction is
a read or a write.
Bits 7-4 are the device type and should be set to
1010b for the FM24C04A. The device type allows
other types of functions to reside on the 2-wire bus
within an identical address range. Bits 3-2 are the
device address. If bit 3 matches the A2 pin and bit 2
matches the A1 pin, the device will be selected. Bit
1 is the page select. It specifies the 256-byte block
of memory that is targeted for the current operation.
Bit 0 is the read/write bit. A 0 indicates a write
operation.
Word Address
After the FM24C04A (as receiver) acknowledges
the slave ID, the master will place the word address
on the bus for a write operation. The word address is
the lower 8-bits of the address to be combined with
the 1-bit page select to specify exactly the byte to be
written. The complete 9-bit address is latched
internally.
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PDF描述 |
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| FM24C05ULZ | 4K-Bit Standard 2-Wire Bus Interface Serial EEPROM |
| FM24C17U | 4K-Bit Standard 2-Wire Bus Interface Serial EEPROM |
| FM24C04UEM8 | I2C Serial EEPROM |
| FM24C04UEMT8 | I2C Serial EEPROM |
| FM24C04UEN | I2C Serial EEPROM |
相關代理商/技術參數 |
參數描述 |
|---|---|
| FM24C04A-STR | 功能描述:F-RAM 4K (512x8) 5V RoHS:否 存儲容量:512 Kbit 組織:64 K x 8 接口:SPI 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube 制造商:Cypress Semiconductor |
| FM24C04B | 制造商:RAMTRON 制造商全稱:RAMTRON 功能描述:4Kb Serial 5V F-RAM Memory |
| FM24C04B_13 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:4Kb Serial 5V F-RAM Memory |
| FM24C04B-G | 功能描述:F-RAM 4Kb Serial I2C 5V FRAM RoHS:否 存儲容量:512 Kbit 組織:64 K x 8 接口:SPI 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube 制造商:Cypress Semiconductor |
| FM24C04B-GTR | 功能描述:F-RAM 4Kb Serial I2C 5V FRAM RoHS:否 存儲容量:512 Kbit 組織:64 K x 8 接口:SPI 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 封裝:Tube 制造商:Cypress Semiconductor |
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