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參數資料
| 型號： | 61LV25616AL |
| 廠商： | Integrated Silicon Solution, Inc. |
| 英文描述： | 256K x 16 HIGH SPEED ASYNCHRONOUS CMOS STATIC RAM WITH 3.3V SUPPLY |
| 中文描述： | 256K × 16高速異步的CMOS靜態RAM為3.3V電源 |
| 文件頁數： | 6/12頁 |
| 文件大小： | 67K |
| 代理商： | 61LV25616AL |
6
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. A
02/21/03
IS61LV25616AL
ISSI
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
-10
-12
Symbol
t
RC
t
AA
t
OHA
t
ACE
t
DOE
t
HZOE
(2)
t
LZOE
(2)
t
HZCE
(2
t
LZCE
(2)
t
BA
t
HZB
(2)
t
LZB
(2)
t
PU
t
PD
Parameter
Read Cycle Time
Address Access Time
Output Hold Time
CE
Access Time
OE
Access Time
OE
to High-Z Output
OE
to Low-Z Output
CE
to High-Z Output
CE
to Low-Z Output
LB
,
UB
Access Time
LB
,
UB
to High-Z Output
LB
,
UB
to Low-Z Output
Power Up Time
Power Down Time
Min. Max.
10
—
2
—
—
—
0
0
3
—
0
0
0
—
Min. Max.
12
—
2
—
—
—
0
0
3
—
0
0
0
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
—
10
—
10
4
4
—
4
—
4
3
—
—
10
—
12
—
12
5
5
—
6
—
5
4
—
—
12
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing and Reference Level
Output Load
Unit
0V to 3.0V
3 ns
1.5V
See Figures 1 and 2
AC TEST LOADS
Figure 1
Figure 2
319
5 pF
Including
jig and
scope
353
OUTPUT
3.3V
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels
of 0V to 3.0V and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage.
319
30 pF
Including
jig and
scope
353
OUTPUT
3.3V
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