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參數資料
| 型號： | 68HC05BD2 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 8-Bit Microcontroller Units (MCU).(8位微控制器) |
| 中文描述： | 8位微控制器單元（MCU）。（8位微控制器） |
| 文件頁數： | 29/85頁 |
| 文件大小： | 302K |
| 代理商： | 68HC05BD2 |
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SECTION 3: CPU CORE
MOTOROLA
Page 19
MC68HC05BD7 Rev. 2.0
GENERAL RELEASE SPECIFICATION
3.1.5.1
Half Carry Bit (H-Bit)
When the half-carry bit is set, it means that a carry occurred between bits 3 and 4 of the
accumulator during the last ADD or ADC (add with carry) operation. The half-carry bit is
required for binary-coded decimal (BCD) arithmetic operations.
3.1.5.2
Interrupt Mask (I-Bit)
When the interrupt mask is set, the internal and external interrupts are disabled. Interrupts
are enabled when the interrupt mask is cleared. When an interrupt occurs, the interrupt
mask is automatically set after the CPU registers are saved on the stack, but before the
interrupt vector is fetched. If an interrupt request occurs while the interrupt mask is set, the
interrupt request is latched. Normally, the interrupt is processed as soon as the interrupt
mask is cleared.
A return from interrupt (RTI) instruction pulls the CPU registers from the stack, restoring the
interrupt mask to its state before the interrupt was encountered. After any reset, the
interrupt mask is set and can only be cleared by the Clear I-Bit (CLI), or WAIT instructions.
3.1.5.3
Negative Bit (N-Bit)
The negative bit is set when the result of the last arithmetic operation, logical operation, or
data manipulation was negative. (Bit 7 of the result was a logical one.)
The negative bit can also be used to check an often tested flag by assigning the flag to bit
7 of a register or memory location. Loading the accumulator with the contents of that
register or location then sets or clears the negative bit according to the state of the flag.
3.1.5.4
Zero Bit (Z-Bit)
The zero bit is set when the result of the last arithmetic operation, logical operation, data
manipulation, or data load operation was zero.
3.1.5.5
Carry/Borrow Bit (C-Bit)
The carry/borrow bit is set when a carry out of bit 7 of the accumulator occurred during the
last arithmetic operation, logical operation, or data manipulation. The carry/borrow bit is
also set or cleared during bit test and branch instructions and during shifts and rotates. This
bit is neither set by an INC nor by a DEC instruction.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| 68HC05BD7 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:SPECIFICATION REV 2.0 (General Release) |
| 68HC05C0FN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microcontroller |
| 68HC05C0P | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microcontroller |
| 68HC05C4AFB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microcontroller |
| 68HC05C4AFN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microcontroller |
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