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參數資料
| 型號： | 68HC05BD2 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 8-Bit Microcontroller Units (MCU).(8位微控制器) |
| 中文描述： | 8位微控制器單元（MCU）。（8位微控制器） |
| 文件頁數： | 4/85頁 |
| 文件大小： | 302K |
| 代理商： | 68HC05BD2 |
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MOTOROLA
Page ii
:
GENERAL RELEASE SPECIFICATION
MC68HC05BD7 Rev. 2.0
4.4
4.4.1
4.4.2
4.4.3
4.4.4
Hardware Interrupts..................................................................23
External Interrupt (IRQ).......................................................23
VSYNC Interrupt .................................................................24
DDC12AB Interrupt.............................................................24
Multi-Function Timer Interrupt (MFT)..................................25
SECTION 5
RESETS..........................................................................27
External Reset (RESET) ..........................................................27
Internal Resets .........................................................................27
Power-On Reset (POR) ......................................................27
Computer Operating Properly Reset (COPR).....................27
Illegal Address (ILADR) Reset............................................28
5.1
5.2
5.2.1
5.2.2
5.2.3
SECTION 6
OPERATING MODES ....................................................29
User Mode................................................................................29
SELF-CHECK MODE...............................................................29
Bootstrap Mode........................................................................29
Mode Entry...............................................................................29
EPROM Programming..............................................................30
Programming Sequence .....................................................30
Programming Control Register (PCR) ................................31
Low Power Modes....................................................................31
STOP Instruction.................................................................31
WAIT Instruction .................................................................31
COP Watchdog Timer Considerations .....................................32
6.1
6.2
6.3
6.4
6.5
6.5.1
6.5.2
6.6
6.6.1
6.6.2
6.7
SECTION 7
INPUT/OUTPUT PORTS................................................33
Port A .......................................................................................33
Port B .......................................................................................33
Port C .......................................................................................33
Port D .......................................................................................33
Input/Output Programming.......................................................34
Port C and D Configuration Register........................................35
7.1
7.2
7.3
7.4
7.5
7.6
SECTION 8
PULSE WIDTH MODULATION......................................37
Operation of 8-Bit PWM ...........................................................37
Open-Drain Option Register.....................................................38
8.1
8.2
SECTION 9
DDC12AB INTERFACE .................................................39
Introduction...............................................................................39
DDC12AB Features..................................................................39
Registers ..................................................................................40
DDC Address Register (DADR)..........................................40
DDC Control Register (DCR)..............................................40
DDC Master Control Register (DMCR)...............................41
DDC Status Register (DSR)................................................43
DDC Data Transmit Register (DDTR).................................44
9.1
9.2
9.3
9.3.1
9.3.2
9.3.3
9.3.4
9.3.5
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